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alimh
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interruptable machine instructions - 2005/06/10 18:10 do you know what are interruptable machine instruction? &|
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gaf
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Re: interruptable machine instructions - 2005/06/13 10:28 Hello,
I've never hear that term and, without knowing the context, it's pretty hard to say what it means..

In an Intel document that I found on google (->here) it says on page 14 that there are interruptable instructions on the x86:
- REP + STRING
- ESC (pretty mysterious co-precessor command)

Since the two instructions may take considerable time to execute (imagine that somebody used REP MOVSD to copy a few hundred megs) their execution can be halted if an interrupt occures. The interupt is then handled and after that the execution of the instruction is simply continued. Note that this is not possible with 'ordinary' instructions such as mov which are atomic (ie can't be divided).

regards,
gaf
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anonymous
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Re: interruptable machine instructions - 2005/08/22 13:16 Um, but pretty much any Intel instruction can be interrupted. What if, for example, your source operand is not currently mapped through your page table? Oops, page fault. The swapper gets called up, loads the page with the source operand, and te instruction gets restarted. Oops, the destination address is not in the page table... then the timer goes off and the process gets swapped out,

Just think about it. The question is which instructions are NOT interruptible, There are only a handful.
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gaf
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Re: interruptable machine instructions - 2005/08/23 08:35 Hello,
I suppose that for most instructions interruption is a binary choice as they are atomic. If a one of these instructions causes an exception, the kernel tries to fix the problem and then returns to the program so that the whole instruction is executed again.
For repeated string operations this scheme wouldn't make much sense as they actually consist of a number of atomic string operations that are run one after the other. If one of these atomic instructions failes this doesn't meant that the whole "rep movs" has to be repeated. The kernel thus handles the exception just as it would handle a fault in an ordinary string operation and when it returns to the app the "rep movs" instruction is continued as if nothing would have happend, which is possible as the state information which is stored in exc + edi/edi is still valid.

regrads,
gaf
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