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MrKaktus
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ISR's ;/ - 2005/12/20 03:13 I have remap IRQ, set PIT and then load IDT (which has all selectors set to non present). At end I turn on all Master and Slave IRQ's and NMI. (Code below).
And when I'm calling STI there ocurrs 3rd general protection fault ;/.
So I don't know what Is wrong ;/. Please help.



; (Inicjacja PIC)
; Przemapowanie IRQ na odpowiednie numery INT

; ICW 1
mov al,0x11 ; Komputer AT/PS-2 z kaskada ukladow
out 0x20,al ; |-Master i Slawe. IRQ inicjowane zboczem.
out 0xA0,al ;/ Bedzie wyslany bajt ICW4.

mov al,0x20 ; ICW 2
out 0x21,al ; |_Ustawiamy nowe numery INT dla IRQ.
mov al,0x28 ; | IRQ 0-7 maja numery 0x20-0x27 (32-39)
out 0xA1,al ;/ IRQ 8-15 maja numery 0x28-0x2F (40-47)

mov al,0x04 ; ICW 3
out 0x21,al ; |_Ustawiamy polaczenie Slave z Master.
mov al,0x02 ; | Master ma traktowac IRQ2 jako wywolanie Slave.
out 0xA1,al ;/ Slave ma wysylac IRQ2 do Mastera.

mov al,0x01 ; ICW 4
out 0x21,al ; |-Tryb pracy zgodny z 8086/88,
out 0xA1,al ;/ wysylamy 8bitowy numer INT.


; (Inicjacja PIT)
; Ustawienie generatora 8253/8254 na generowanie
; przerwania IRQ0 z czestotliwoscia 100Hz (99.998Hz)

mov al, 0x34 ;_Wysylamy rozkaz zaprogramowania
out 0x43, al ;/ generatora 0, na tryb 2. (00110100b)
mov al, 156 ;_Wysyla LSB (156)
out 0x40, al ;/
mov al, 46 ;_Wysyla MSB (46)
out 0x40, al ;/ [ (46*256)+156=11932 - dzielnik zegara]


; (Inicjacja IDT)
; Zaladowanie do rejestru LIDT adresu tablicy IDT
; i odblokowanie wszystkich linii IRQ oraz NMI.

lidt [IDT_Reg] ; Zaladowanie tablicy IDT

xor al, al ;Odblokowujemy wszystkie IRQ
out 0x21, al ;/dla ukladu 8259A Master
xor al, al ;Odblokowujemy wszystkie IRQ
out 0xA1, al ;/dla ukladu 8259A Slave

in al, 0x70 ;
and al, 0x7F ; |-Wlaczamy przerwanie NMI
out 0x70, al ;/

sti ; Wlaczamy obsluge przerwan

jmp $


.
.
.


IDT_Tab:

; Na poczatku IDT jest pelne pustych wpisow

%rep 0x40 ; 0x38
dw 0x0000 ; Offset 0-15
dw 0x08 ; Selektor segmentu kodu DPL 0
db 00000000b ; Wyzerowane, Reserved
db 00001110b ; NIE-OBECNY , DPL0, 32bit
dw 0x0000 ; Offset 16-31
%endrep

IDT_End:

IDT_Reg: dw IDT_End - IDT_Tab - 1
dd IDT_Tab


End of code.


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gaf
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Posts: 153
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Re: ISR's ;/ - 2005/12/20 10:13 Could it be that you simply forgot to paste the ISR's address into the IDT entries ?
Code:
%rep 0x40 ; 0x38 

dw 0x0000 ; Offset 0-15 [b]
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MrKaktus
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Junior Osdever
Posts: 12
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Karma: 1  
Re: ISR's ;/ - 2005/12/20 15:21 No , I make it specially (present bit is set to ZERO - 0). I have solve it by setting all IDT entries to one ISR handler which is doing nothing. Now I will separate it One by One and write ISrs for each of them.
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gaf
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Platinum Osdever
Posts: 153
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Karma: 10  
Re: ISR's ;/ - 2005/12/21 11:48 As Jaaman has already said in your other thread at osdev.org, setting the present bit to zero won't solve the problem as a triple fault is raised whenever an interrupt can't be dispatched due to an invalid/non-active IDT entry. If you use the code snipped that follows to create a basic IDT that delivers all IRQs to a single handler you shouldn't get GPFs any longer:

Code:
mov edi, IDT_TAB

mov ecx, 0x30 ; How many entries ?

idt_exception_entry:
mov eax, exception
stosw
mov eax, 0x8E000008
stosd
mov eax, exception
shr eax, 16
stosw
loop idt_exception_entry

...

exception:
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax

mov esp, 0x7e00

call print_something
hlt

regards,
gaf
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MrKaktus
User

Junior Osdever
Posts: 12
graphgraph
Karma: 1  
Re: ISR's ;/ - 2005/12/29 07:10 Ok, i have solved it on my own way. look thread at osdev.org .
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